This invention relates to solid state circuits having specific dedication to certain functions in digital logic or arithmetic circuitry. Specifically, it relates to circuits for performing "EXCLUSIVE OR" functions, and especially that class of circuitry known as EXCLUSIVE OR "gates" which are implemented within large scale integrated circuits (LSI) with NMOS technology.
Certain design methodologies have dominated circuit design approaches in the past. One of these was that high speed circuitry generally requires more power and takesup more silicon area than low speed circuitry. High speed circuits are more desirable in any application. However, with the advent of mini-computers, micro-processors and LSI circuitry, it has become increasingly desirable to increase circuit speed (i.e. minimize propagation (or delay times) while still minimizing power consumption and size (i.e. silicon area needed to implement a circuit).
Arithmetic decision making or logic functions used in computing hardware are almost always operated with clock pulses. Such clock pulses assure synchronous operation, minimize data (bit information) loss and minimize errors.
An object of the present invention is to utilize the existence of low impedance, non-overlapping clock pulses in logic function operation.
A second object of this invention is to provide such a logic function operation in a circuit which may be operated at much higher speeds than is normally possible using conventional design methodologies.
A further object of this invention is to provide such a logic circuit which utilizes such clock pulse signals to precondition the circuit enabling a fast rise or trigger, i.e. high speed propagation, the application of such preconditioning causing a "self booting" effect on the circuit.